Search - can ip core

[Other resource] USB 2.0 IP Core

Description: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Platform: | Size: 181283 | Author: 林风 | Hits:

[VHDL-FPGA-Verilog] MC8051 IP Core

Description: 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware description language can be downloaded to the FPGA/CPLD as a system-on-chip processor
Platform: | Size: 532480 | Author: zy | Hits:

[VHDL-FPGA-Verilog] I2C_IPcore_VHDL

Description: 这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核，可直接编译运行-I2C serial data communication protocol to VHDL hardware description language of the IP core can be directly translated Operation
Platform: | Size: 6144 | Author: 陈州徽 | Hits:

[VHDL-FPGA-Verilog] USB 2.0 IP Core

Description: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Platform: | Size: 181248 | Author: 林风 | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera的IP源码8237

Description: 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
Platform: | Size: 207872 | Author: 上面的 | Hits:

[Driver Develop] wb_dma.tar

Description: DMA的控制器的IP核,和ATA控制器配合,可以实现DMA方式高速传输数据.-DMA controller IP core, and ATA controller tie, DMA can achieve high-speed transmission of data.
Platform: | Size: 143360 | Author: 李想 | Hits:

[VHDL-FPGA-Verilog] user_logic_VGA_Controller

Description: user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller IP核了，很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller IP core, very convenient to use.
Platform: | Size: 70656 | Author: 曾 | Hits:

[VHDL-FPGA-Verilog] mlite.tar

Description: Plasma IP Core 你可以利用这个组件在FPGA中设计MIPS结构的CPU -Plasma IP Core You can use this component in FPGA design the structure of MIPS CPU
Platform: | Size: 100352 | Author: xinyang | Hits:

[VHDL-FPGA-Verilog] MIT_MIPS_Core.tar

Description: 麻省理工的一个实验室实现的MIPS IP CORE，可以在FPGA上跑通 -a Massachusetts Institute of Technology laboratory achieved MIPS IP CORE, the FPGA can run on Link
Platform: | Size: 28672 | Author: xinyang | Hits:

[VHDL-FPGA-Verilog] ml505_pcie_x1_plus

Description: Xilinx 公司PCI Express IP核应用参考设计。通过这个样例，用户可以掌握PCI Express应用设计的一般方法，了解PCI Express的工作原理。-Xilinx Inc. PCI Express IP core reference design applications. Through this example, the user can master the application of the design of PCI Express general approach to understand the working principle of PCI Express.
Platform: | Size: 1798144 | Author: daniel J | Hits:

[Other Embeded program] SRAMCotroller

Description: 一个SRAM控制器的IP核，很不错，有兴趣的朋友可以下去-An SRAM controller IP core, very good friends who are interested can go on
Platform: | Size: 322560 | Author: liufanyu | Hits:

[Streaming Mpeg4] rs_enc

Description: 使用IP Core实现了3GPP/UMTS所规定的Turbo码编码，可以在Virtex全系列和Spartan-3E等芯片上使用，最多支持１６路信号，能提供3GPP所要求的1/3码率输出和可选的1/5码率输出-Use IP Core achieved 3GPP/UMTS provided for Turbo-Coded, you can Virtex series and Spartan-3E chip such as the use, supports up to 16-way signal, 3GPP can provide the required 1/3 bit-rate output and optional 1/5 Rate Output
Platform: | Size: 1024 | Author: 刘横 | Hits:

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[Other resource] USB 2.0 IP Core

[VHDL-FPGA-Verilog] MC8051 IP Core

[VHDL-FPGA-Verilog] I2C_IPcore_VHDL

[VHDL-FPGA-Verilog] USB 2.0 IP Core

[ARM-PowerPC-ColdFire-MIPS] Altera的IP源码8237

[Driver Develop] wb_dma.tar

[VHDL-FPGA-Verilog] user_logic_VGA_Controller

[VHDL-FPGA-Verilog] mlite.tar

[VHDL-FPGA-Verilog] MIT_MIPS_Core.tar

[VHDL-FPGA-Verilog] ml505_pcie_x1_plus

[Other Embeded program] SRAMCotroller

[Streaming Mpeg4] rs_enc

[VHDL-FPGA-Verilog] AVR

[VHDL-FPGA-Verilog] RISC_CPU

[VHDL-FPGA-Verilog] 8051core

[VHDL-FPGA-Verilog] DE2_NIOS_LITE_SRAM

[VHDL-FPGA-Verilog] can

[VHDL-FPGA-Verilog] can

[VHDL-FPGA-Verilog] ethernet10-100M-IP-core

[assembly language] CAN-IP-Core

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